发明名称 Semiconductor integrated circuit with memory cell field for digital signal processing - has memory cell groups with bit fields, each with matrix of columns and lines
摘要 The memory cell field (1) has numerous memory cell groups (A, B), each with several bit fields (A0-n-1; BO-n-1) with a matrix of memory cells with a column(s) and a number of lines. Each bit field is adjacent to a bit field of another memory cell group. A number of selectors (4,5) are provided, corresponding to the memory cell groups. The selectors react to address signals, applied independently to the groups, to select respective memory cells of relevant groups. An operational unit responds to signals read out from the memory cells of at least one group, to carry out a preset operation. Pref. the operational unit has a number of operational circuits (FA0-n-1), corresp. to bit fields. ADVANTAGE - Small surface area and high operational speed.
申请公布号 DE4137515(A1) 申请公布日期 1992.05.21
申请号 DE19914137515 申请日期 1991.11.14
申请人 MITSUBISHI DENKI K.K., TOKIO/TOKYO, JP 发明人 MATSUMURA, TETSUYA;SEGAWA, HIROSHI;ISHIHARA, KAZUYA;URAMOTO, SHINICHI;YOSHIMOTO, MASAHIKO, ITAMI, HYOGO, JP
分类号 G11C11/41;G11C7/10;G11C11/401 主分类号 G11C11/41
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