| 摘要 |
A circuit having a completely synchronous and digital implementation for encoding a stream of digital data (NRZ form) into the coded marked inversion (CMI) format. The circuit includes a state machine having a predetermined number of defined legal and illegal states, an illegal state detection circuit, and an output circuit. When the state machine enters an illegal state because of, for example, the effects of noise or distortion on the digital data signal, the illegal state detection circuit forces the state machine back into a legal state.
|
