发明名称 BI-DIRECTION SHIFT REGISTER
摘要 PURPOSE:To eliminate the difference of set up and hold time of data by making a 1<st> bit and a n<th> bit of a bi-directional flip-flop circuit of (n) numbers to be adjacent, and arranging them on a signal input terminal side. CONSTITUTION:The order of the layout arrangement of the bi-directional flip- flop circuit of 1-10 is, for example, the 1<st> bit, 10<th> bit, 2<nd> bit, 9<th> bit, ...5<th> bit, 6<th> bit. The set-up and hold time of the data in such a case is decided by the input timing of the shift clock input terminal 13 and the DATA input terminal 11 of the bi-direction flip-flop circuit 1 of the 1<st> bit. Also, the output delay time is decided by the input timing of the shift clock input terminal 13 and the input/output terminal 11 of the 10<th> bit bi-direction flip-flop circuit 10. Thus, the set-up and hold time and the delay time of the data at the time of left shift and right shift can be made the same.
申请公布号 JPH04134798(A) 申请公布日期 1992.05.08
申请号 JP19900257840 申请日期 1990.09.26
申请人 NEC KANSAI LTD 发明人 NAKAKARUMAI SUSUMU
分类号 G11C19/00 主分类号 G11C19/00
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