| 摘要 |
<p>A fully differential sample and hold circuit for adding a single-ended signal (Vaux) and fully differential signals (V) and (-V). The circuit includes an operational amplifier (OP) having a first and a second output and a first and a second input; capacitors (C1-C8); and switches (S1,S2) for connecting the single-ended signal and the fully differential signals to the capacitors and the amplifier. The amplifier (OP) provides at its two outputs two output signals whose difference is substantially aV+bVaux, a,b are constants. <IMAGE></p> |
