| 摘要 |
<p>PURPOSE:To enable a correction of data with a single ROM and to remove a limitation of the correction range by supplying a reading address to a correction information memory, inputting the correction data to a patch circuit when the address coincides with a stored address, and making to correct the read address of a cell array. CONSTITUTION:The data read out and outputted from the cell array 10 are checked after the production and inputted from I/O pins 01-08 for the correction data making the data to desirable ones, and also the read out addresses are inputted from address pins A1-An and written to the correction information memory 20. When the plural addresses, the read out data of which are not the desirable ones, are in existence, the same operation is repeated to write the plural addresses and corrected data in the memory 20. By the arrangement such as the above, when the read out address coincides with the stored address at the time of reading the cell array 10, the corrected data are supplied to the patch circuit 15 from the memory 20, then the read out data of cell array 10 are corrected and outputted to the I/O pins. Thus, the data can be corrected by the single ROM 10 and the limit of correctable range can be removed.</p> |
