发明名称 HOLD-OVER CIRCUIT
摘要 PURPOSE:To realize the hold-over mode with high accuracy without need of a voltage control circuit or the like by comparing a count of a synchronization timing with a count of a voltage controlled crystal oscillator and integrating the difference so as to control the voltage controlled crystal oscillator. CONSTITUTION:A detector 20 detects a fault of a synchronization timing but some time elapses from the occurrence of clock interruption or a defective clock till the fault is decided because a protection stage is provided. The count of a counter 11 is not normal on the occurrence of clock interruption or a defective clock and then an abnormal value is being written in a memory 12. However, the detector 20 decides a fault before n-sets of clocks are written to stop an output of a frequency divider 21 thereby stopping the write in the memory 12, and since a read address is an oldest address, the content if a normal value before the fault takes place and the output of a voltage controlled crystal oscillator VCXO 17 is made proportional to the said content. As a result, the small sized hold-over circuit is realized independently of the accuracy of the VCXO without need of provision of a voltage control circuit.
申请公布号 JPH04119012(A) 申请公布日期 1992.04.20
申请号 JP19900238494 申请日期 1990.09.07
申请人 FUJITSU LTD 发明人 TAKI NOBUTAKA
分类号 H03L7/14;H03L7/181 主分类号 H03L7/14
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