发明名称 METHOD OF MANUFACTURING MOS FET INTEGRATED CIRCUIT FOR A MEMORY
摘要 PURPOSE: To manufacture a high-speed dynamic RAM using optical lithography by forming an N<-> -type region by performing ion implantation of an N<-> -type impurity before the ion implantation process of an N<+> -impurity. CONSTITUTION: An insulator region 11 that extending toward the upper part of the surface of a body and is arranged with a gap is provided at the single- crystal silicon body. A polysilicon gate electrode 13 having basically a vertical surface is formed between adjacent insulator regions. An N<-> -type impurity is subjected to ion implantation, and an N<-> -type impurity region is formed between the vertical surface of the gate electrode and the insulator region. After that, by forming an insulator layer 16 at the top of the horizontal surface of the single-crystal silicon body, a nearly vertical surface is formed adjacently on a nearly horizontal surface. After that, finally insulator layer 16 formed is subjected to reaction ion etching, all of insulator layer 16 that is arranged nearly horizontally are eliminated, an insulator region with a narrow dimension being adjacent to a nearly vertical surface or a side wall spacer 20 is left, and an N<-> -type impurity located at a lower side is protected from the later ion implantation of an N<+> -type impurity.
申请公布号 JPH04118966(A) 申请公布日期 1992.04.20
申请号 JP19900255459 申请日期 1990.09.27
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 SEIKI OGURA;POORU JIEI TSUANGU
分类号 H01L21/336;H01L21/8242;H01L27/10;H01L27/108;H01L29/08;H01L29/78 主分类号 H01L21/336
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