| 摘要 |
When selectors select a printer A in accordance with a printer select signal derived from a main body of a data processing system, a horizontal sync signal supplied from the printer A resets a 16-bit counter. An internal clock signal generator generates a clock signal and applies it through the selector to the counter. The counter counts the internal clock signal and produces a carry signal. In response to the carry signal, a line buffer circuit produces image data and transfers it to the printer A. When a printer B is used, the printer B sends a dot clock signal to the counter. Image data is read out from the line buffer circuit by a carry signal generated in a similar way, and is transferred to the printer A.
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