| 摘要 |
PURPOSE:To accelerate data processing and to reduce the quantity of hardware by using the fundamental clock(original oscillation clock) of the operating clock of a data processing part as the operating clock of the data processing part. CONSTITUTION:A data processing part 2 performs prescribed processing on supplied data according to a reference clock signal CKOA generated at a clock signal generation circuit 1A, and outputs at least a control code out of the control code which designates processed data and the content of the data processing. A data processing part 4A transfers the data, the control code, and the reference clock signal CKOA from the data processing part 2A to the outside according to the reference clock signal CKOA and the control code, and supplies the data transferred from the outside(semiconductor integrated circuit device 100B to the data processing part 2A according to a transferred clock signal and a fetched reference clock signal. Thereby, the data processing in data communication can be accelerated, and also, the quantity of hardware can be reduced. |
