| 摘要 |
PURPOSE:To reduce the number of hardwares by providing this fault detection circuit with a circuit for holding a select register for setting up the selecting condition of input selection to an error register simultaneously with the setting of the error register. CONSTITUTION:The selecting condition signals SEL0, SEL1 of the 1st register 10 are set up in a 1st selector selecting condition storing flip flop(FF) 50 simultaneously with the setting of data in the 1st register 10, and then a 1st register checking circuit 80 detects a parity error. The parity error is set up in an error status storing FF 70 and inputted to the 1st holding circuit 100, which forms the holding condition of the FF 50 and hold the FF 50. Since the selector condition of a position generating a fault can be held without preparing a pass indicator, the number of hardwares can be reduced. |
