INTEGRATED MEMORY CIRCUIT HAVING A SINGLE WRITE BUS CIRCUIT,申请号EP19870201748-传众专利搜索

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发明名称	INTEGRATED MEMORY CIRCUIT HAVING A SINGLE WRITE BUS CIRCUIT
摘要
申请公布号	EP0270137(B1)	申请公布日期	1992.03.18
申请号	EP19870201748	申请日期	1987.09.14
申请人	N.V. PHILIPS' GLOEILAMPENFABRIEKEN	发明人	PFENNINGS, LEONARDUS CHRITIEN MATHEUS GIELLAUMUS
分类号	G11C11/401;G11C7/10;G11C7/18;G11C11/41;G11C11/419	主分类号	G11C11/401
代理机构		代理人
主权项
地址

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