发明名称 METHOD AND DEVICE FOR DATA TRANSMISSION
摘要 <p>PURPOSE:To satisfactorily transmit plural control information by transmitting a bit synchronizing signal for a period longer than the data length of a prescribed number of bits in advance of data which includes a start bit and consists of the prescribed number of bits. CONSTITUTION:The bit synchronizing signal is transmitted for a period longer than the time length of a data part consisting of the prescribed number of bits in advance of this data part which includes the start bit and consists of the prescribed number of bits. In this case, a clock signal part preceding the data part has a period 1T and 50% duty cycle and consists of a clock signal functioning as the bit synchronizing signal and has such length that data for control signal of the data part can be surely demodulated with the clock signal on the reception side. Thus, plural control information are satisfactorily transmitted.</p>
申请公布号 JPH0482057(A) 申请公布日期 1992.03.16
申请号 JP19900196510 申请日期 1990.07.25
申请人 VICTOR CO OF JAPAN LTD 发明人 TERANISHI YASUHIKO
分类号 G11B20/16;G11B20/10;H04L7/04 主分类号 G11B20/16
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