| 摘要 |
<p>PURPOSE:To reduce and magnify an image with an arbitrary variable power ratio with simple circuit configuration and to perform linear interpolation, contour line enhancement, and smoothing for image data at high speed by changing the sampling cycle of an A/D conversion means by varying the timing clock of a variable cycle clock generating means. CONSTITUTION:Digital image data of one line of image is converted to an analog signal by a D/A conversion means 1, and desired waveform arrangement is applied to a converted analog signal by analog signal arranging means 3a-3c, and a waveform arrangement-processed analog signal is converted to a digital signal by the A/D conversion means 4. Also, a converted digital signal is stored in a storage means 7, and the timing clock is generated by the variable cycle clock generating means 5 corresponding to magnification/reduction processing. The sampling cycle of the A/D conversion means 4 can be changed by varying the timing clock of the variable cycle clock generating means 5. In such a manner, it is possible to reduce and magnify the image to a smooth image with the arbitrary variable power ratio with simple circuit configuration, and to attain the linear interpolation, the contour line enhancement, and the smoothing of the image data at high speed.</p> |
