| 摘要 |
<p>PURPOSE:To simplify a circuit configuration and to reduce current consumption on an action by incorporating a semiconductor element having the maximum data bus and providing a circuit to control data bus width at the post stage of it. CONSTITUTION:When the circuit is actuated with data bus width 8 bits, an 8/16 bit action control input signal 6 is made 'H' and a card inable signal 7 is made 'L'. Then, a ROM 3b outputs the address data of 16 bits to internal data buses 12 and 13. A data bus width variable circuit 5 outputs the signal of the internal data bus 13 to a low-order data bus 15 when a least significant address signal 8 is the 'L' and outputs the signal of the bus 12 to a bus 15 when it is the 'H'. The action of 16-bit-width makes an action control input 6 the 'L' and makes the signal 7 the 'L'. Then, the variable circuit 5 outputs the signals of the buses 12 and 13 to a high-order data bus 14 and to the low- order data bus 15 as 16 bits.</p> |
