发明名称 BALANCE ADJUSTING CIRCUIT
摘要 PURPOSE:To correct by adjust balance among channels by counting directions according to direction signals after defining the output signal of an oscillation circuit as a clock, and attenuating signals passing through each channel according to the output signal of a decoder which decodes the counted value. CONSTITUTION:An oscillation circuit 21 operates according to a timing signal obtained from a discrimination circuit 20. For example, when right and left stereoscopic signals at almost the same levels are impressed to right and left input terminals 14 and 13, the value of the output signal of a signal generating circuit 19 is close to a reference voltage Vref. Because of this, the output signal of the discrimination circuit 20 goes to an L level, and the oscillation circuit 21 starts the operation. Then, the oscillation circuit 21 continues the oscillation as long as an output signal Vx of the signal generating circuit 19 is within the ranges of reference voltages VA and VB of the discrimination circuit 20. Therefore, a decoder 25 decodes successively the counted value of a counting circuit 24, and controls right and left attenuating circuits 18 and 17 so as to hold a balance state.
申请公布号 JPH0457500(A) 申请公布日期 1992.02.25
申请号 JP19900168809 申请日期 1990.06.27
申请人 SANYO ELECTRIC CO LTD 发明人 MEYA MASATO;ISHIKAWA TSUTOMU
分类号 H04S7/00;H03G3/20;H03G3/30 主分类号 H04S7/00
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