发明名称 TROUBLE SHOOTING DEVICE FOR LOGIC INTEGRATED CIRCUIT
摘要 PURPOSE:To perform a trouble diagnosing and to shorten a diagnosing time by presuming a trouble position based on a measured result of a general-purpose tester, and collating an expected value obtained from a logic simulation LS reflecting it with the measured result. CONSTITUTION:An LSI is decided as specifications by a general-purpose tester by using a test pattern TP generated based on logic connection data DT. From this test, an output of the LSI as a measured DT is corresponded to an expected value obtained previously, and a fail list FL of how to fail at any TP is obtained if not as the specifications. A trouble position to be detected from this is set, and a logic SL is conducted after alteration of the logic connection DT. The expected value DT of the result is collated with the measured DT, and both are completely coincident if only set trouble to be detected is a cause. If not complete coincidence is obtained but the number of fails of FL is reduced, it is stored as a cause. The setting of the trouble to be detected, logic SL and collation are executed until the coincidence is obtained. According to this, estimation of the trouble is facilitated, its priority can be decided, and a diagnosing time can be shortened.
申请公布号 JPH0455776(A) 申请公布日期 1992.02.24
申请号 JP19900167293 申请日期 1990.06.25
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 OKAMOTO HIDETAKA;MATSUMOTO KIYOSHI;ISHIHARA TAKAKO
分类号 G01R31/28;G06F11/22 主分类号 G01R31/28
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