Integrated semiconductor circuit with standard cells - has one cell interconnection in internal region of standard cell(s)

摘要

A number of standard cells, each with a logic function, are arranged to form an external connection between them by intercell coupling wiring. The integrated semiconductor circuit has at least one intercell coupling wiring in an internal region of at least one standard cell. The cell arrangement and wiring locates the cells, each with an input and output terminal, next to latch other in a preset alignment of a cell line. In the latter extends a cell wiring layer in the present direction. The cell liners are provided with such layer in the present direction, electrically independent of cells in the line. USE/ADVANTAGE- For flip-flops, gates, functional blocks etc., with high integration density w.r.t. the standard cell system.