| 摘要 |
PURPOSE:To increase the number of bits to be transmitted as suppressing arithmetic quantity and the memory capacity of a code register and to suppress the increment of distortion due to a transmission line error by combining and encode-outputting the number of a selected reproducing vector and a code representing processing. CONSTITUTION:2<b> reproducing vectors are prepared in the code register 13. The reproducing vector from the code register 13 is separated to an odd- numbered element and an even-numbered element, and they are supplied to code selection parts 17, 18, respectively, and the code selection parts 17, 18 output inputted elements by performing or not performing polarity inversion, and the distance of those output from the odd-numbered element (sample) and the even-numbered element (sample) in input vectors (u) are calculated in distance calculation parts 21, 22, respectively, and those calculated distance are added in an adder circuit 23, and the reproducing vector with the minimum distance is selected in a decision part 24, and the number of the reproducing vector is outputted as the code. |
