| 摘要 |
PURPOSE:To give a delay to a signal by performing the reading-out from another address that is already written while the data is written to a certain address. CONSTITUTION:A counter 32 counts clock signals, and a selector 21 selects an input signal (a) as an output signal (c) when the clock signal is set at H. While the selector 21 selects an input signal (b) as an output signal (c) when the clock signal is set at L. The signal (a) is set equal to the count value of the counter 32; while the signal (b) is set equal to the value obtained by subtracting a constant from the count value of the counter 32. An RAM31 is switched to the write mode and the read mode when the clock signal is set at H and L respectively. The signal (c) is connected to the address of the RAM31. That is, the input signal is turned into an output signal after it is delayed by an amount of time which is equivalent to the difference of levels between signals (a) and (c). |
