Event qualified test architecture.

摘要

An event qualification architecture comprises event qualification cells (24) having an internal memory for detecting qualification events. The event qualification cells (24) output a signal indicating when a match has occurred, which is interpreted by an event qualification module (22). The event qualification module controls the test circuitry which may include test cell registers (14, 16) and test memory (28). A number protocols are provided which can be designed into a circuit to provide the timing and control required to activate test logic in the circuit during normal system operation. <IMAGE>