| 摘要 |
PURPOSE:To speed up the operation of more than three input necessary for color image processing by incorporating a two input arithmetic circuit inputting two data with n-bits, further incorporating the arithmetic circuit of more than three input inputting respective blocks B0, B1,...Bm-1 dividing a data bus with the above-mentioned n-bits into 'm' with more than three. CONSTITUTION:In a first phase, the process from the data input from the outside to the set of temporary registors TR, TG, TB, and TA is performed. Next, the process by respective circuits is performed in second, third, and forth phases. At last, in a fifth phase, so far as the process to write the output data from an ALU in an external memory, etc., is performed. These five phases can be synchronizingly moved in parallel by placing a latch, etc., between them. The entire parallelism is improved by reducing these phases as necessary and the throughput is improved. |
