| 摘要 |
PURPOSE:To perform a high speed operation and to perform a miniaturization by composing a bit line of a polycrystalline silicon layer or a silicide layer and a shallow diffused layer solid diffused in a silicon substrate, and providing a channel region of a memory transistor in a groove dug deeper than the diffused layer. CONSTITUTION:A channel stopper layer 6 and a field oxide film 4 are formed on a P-type silicon substrate 2 to form a channel doped layer, a polycrystalline silicon layer 10a is then deposited and phosphorus is implanted on the entire surface. Then, it is coated with resist to form a resist pattern 22 on a region formed with a bit line, the layer 10a is etched to form a pattern 10. Thereafter, the substrate 2 is etched to form a groove 11. When it is heat treated, phosphorus is diffused to form N<+> type diffused layers 8s, 8d, and a gate oxide film 12 in the groove 11 to cause an accelerated oxidation, thereby forming a silicon oxide film 14. Then, a polycrystalline silicon layer is formed, and patterned to form a word line 16. As a result, a high speed operation and a miniaturization can be performed. |
