| 摘要 |
<p>A single chip central processor which achieves very high speed by operating in an ''asynchronous'' mode in which the length of cycles of operation can be varied in accordance with the time take for individual instructions to execute. In addition to data movement means and an arithmetic and logic unit the c.p.u. includes an instruction feed unit which can supply instructions from different sources including on-chip RAM and ROM, in response to the actual instructions themselves or in response to externally-generated interrupts.</p> |
