MOS TRANSISTOR WITH SILICIDE LAYER AND METHOD FOR THEREOF

摘要

A MOS transistor having a silicide layer and a manufacturing method thereof are provided to increase an area of a silicide layer formed on a source/drain region by etching an isolation layer with a certain depth before or after forming a gate electrode. An isolation layer(102a) is formed on a semiconductor substrate(100). An epitaxial growth layer is formed on an upper portion of an active region of the semiconductor substrate exposed by the isolation layer. A gate dielectric(104) and a gate electrode(106) are sequentially stacked on an upper portion of the epitaxial growth layer. The isolation layer is etched lower than a surface of the semiconductor substrate. A spacer(108) is formed on a sidewall of the gate electrode. Source/drain regions are formed in the semiconductor substrate between the spacer and the isolation layer and in the epitaxial growth layer. A silicide layer(112) is formed on the epitaxial growth layer.