D/A converter.

摘要

The D/A converter comprises a bias circuit (10) including a series circuit of the drain-source of a bias FET (QA) and a bias resistor (10b) connected between a power source terminal (Vcc) and a reference potential point. The bias circuit includes a negative feedback amplifier (10a) having a same phase input terminal (10c) to which a reference voltage is supplied and an inverted phase input terminal connected to a junction between the source of the bias FET (QA) and the bias resistor (10b). An output terminal of the negative feedback amplifier (10a) is connected to the gate of the bias FET (QA). A digital to analog converting section (11) includes a plurality of constant-current source FETs (Q1...Qn) having a current value substantially equal to the current value of the bias FET (QA) of the bias circuit (10). The digital to analog converting section further includes a plurality of current switches (S1...Sn) for selectively supplying currents of the constant-current source FETs (Q1...Qn) to an output terminal (11c) in response to a digital input signal. By means of this circuit the amplitude value of the output signal can be controlled accurately. A load resistor (11b) is connected to the output terminal (11c) to produce an analog output voltage. The resistance value of the bias resistor (10b) is set to 2<n>-1 times the resistance value of the load resistor (11b) so that the full scale voltage at the output terminal becomes substantially equal to the reference voltage, n being a number of bits of the digital input signal. Thus, the maximum amplitude value (full scale value) of an output signal can be set accurately. <IMAGE>