发明名称 Fast lock time phase locked loop
摘要 A fast locking phase locked loop includes a first integrator that provides a signal representing a function of the mathematical or ideal integral of the phase difference between an input signal and a feedback signal. A voltage controlled oscillator is coupled to the first integrator and provides a signal to a phase shifter that provides the phase shifted signal that represents a function of the phase of the signal from the VCO, and a function of the integral of the phase difference between the integrated signals.
申请公布号 US5081427(A) 申请公布日期 1992.01.14
申请号 US19900619648 申请日期 1990.11.29
申请人 MOTOROLA, INC. 发明人 SUAREZ, JOSE I.
分类号 H03L7/081;H03L7/089 主分类号 H03L7/081
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