METHOD OF FORMING SEMICONDUCTOR INTEGRATED CIRCUIT USING MASTER SLICE APPROACH,申请号US19890366486-传众专利搜索

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发明名称	METHOD OF FORMING SEMICONDUCTOR INTEGRATED CIRCUIT USING MASTER SLICE APPROACH
摘要
申请公布号	US5081059(A)	申请公布日期	1992.01.14
申请号	US19890366486	申请日期	1989.06.15
申请人	FUJITSU LIMITED	发明人	OHE, RYOICHI
分类号	H01L21/822;H01L21/82;H01L27/04;H01L27/118;H03K19/173	主分类号	H01L21/822
代理机构		代理人
主权项
地址

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