| 摘要 |
PURPOSE:To decrease the number of integrated circuits and to enhance the effect more as the number of memories is increased more by employing a shift register circuit especially. CONSTITUTION:The 1-bit memory circuit is provided with a counter circuit 101 operated at a frame pulse with a period as that of an input data and a clock with a period being n-times of the period and a comparator circuit 102 comparing an output of the counter circuit 101 with an address bit. An n-stage shift register circuit 104 holding the input data and a selector circuit 103 inserting the input data to a feedback loop of the shift register circuit 104 and the output of the comparator circuit 102 is connected to a control signal of the selector circuit 103. Thus, the configuration is attained with integrated circuits on market of comparatively less quantity and the effect is enhanced more as the memory quantity is increased more especially. |
