| 摘要 |
<p>PURPOSE:To set up each block in a system to an optimum operation time matched with an internal processing time, to shorten a waiting time for data processing and to improve a processing speed by supplying each block in a synchronizing system from a clock generator as the maximum synchronizing block required by the block. CONSTITUTION:Clocks 11, 12 of two phases are outputted from a clock generator 1 based upon an external clock 20. When a clock period changing signal 16 is 'L', the periods of the clocks 11, 12 are set up to T, and when the signal 16 is 'H', the periods are set up to 2T. At the time of inputting an external instruction signal 13, block specification information and information relating to a clock period are coded, a block 3 or 7 respectively constituting a data processing part 5 or 9 is selected by an instruction decoder 2 based upon the coded results, the selected result is outputted to data buses 17 to 19 according to the need, and the block 3 or 7 is driven for an operation time matched with the processing time.</p> |
