发明名称 MOVING PICTURE ENCODING CONTROL SYSTEM
摘要 <p>PURPOSE:To execute highly efficient encoding and to reduce circuit scale by dividing one screen of a moving picture signal into plural blocks, executing discrete cosine-conversion in correspondence with the blocks, judging a system to be an intra-frame encoding or inter-frame encoding, selecting and executing it. CONSTITUTION:A discrete cosine conversion part 1 divides one block of the inputted moving picture signal into plural blocks so as to execute discrete cosine conversion. An encoding part 2 encodes them and records them in a recording part 3. A control part 4 compares an intra-frame signal with an inter-frame differential signal as to a fixed number on a low frequency component-side containing the DC component of a conversion coefficient corresponding to the blocks by the accumulation of absolute values, judges whether information quantity becomes less or not at the time of any encoding and controls the encoding part 2. Thus, the delay time of the delay circuit is shortened, the circuit scale of the delay circuit is reduced and integration becomes facile.</p>
申请公布号 JPH03295377(A) 申请公布日期 1991.12.26
申请号 JP19900096326 申请日期 1990.04.13
申请人 FUJITSU LTD 发明人 KONOSHIMA MAKIKO;KAWAI OSAMU;MATSUDA KIICHI
分类号 H04N19/50;H03M7/30;H04N1/41;H04N11/04;H04N19/107;H04N19/136;H04N19/137;H04N19/167;H04N19/176;H04N19/196;H04N19/42;H04N19/423;H04N19/503;H04N19/60;H04N19/61;H04N19/625;H04N19/91 主分类号 H04N19/50
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