| 摘要 |
<p>Global registers (16) for a multiprocessor system support multiple parallel access paths for simultaneous operations on separate sets of global registers (16), each set of global registers referred to as a global register file (400). An arbitration mechanism (51) associated with the global registers (16) is used for resolving multiple, simultaneous requests to a single global register file (400). An arithmetic and logical unit (ALU) (460) is also associated with each global register file (400) for allowing atomic arithmetic operations to be performed on the entire register value for any of the global registers in that global register file (400).</p> |
