| 摘要 |
PURPOSE:To make a sampling timing, which is required in digital signal demodulation, most suitable automatically in accordance with the change of a transmission line, by changing the output phase of a phase controlling circuit to control the phase of sampling clocks. CONSTITUTION:In an error detector 6, the difference between a sample value in a sampling circuit 10 of a discriminating circuit 1 and the discrimination value is detected by a subtractor 60, and the absolute value is obtained by a folding rectifying circuit 61. A perturbation signal generated in an oscillator 51 and the output signal of an integrator 53 are added in an adder 52. A correlator 50 is provided for obtaining the correlation value between the output of the oscillator 51 and the output of the detector 6 and supplies the output to the integrator 53. The output of the adder 52 is applied as a phase control signal to a phase control input terminal 104. Thus, the output phase of a clock extracting circuit 3 is controlled to perform such control by this output that the most suitable sampling is attained. |
