发明名称 SEMICONDUCTOR MEMORY OF BITLINF MULTI-TIME CROSSING
摘要 PURPOSE: To reduce noise interference by making complimentary bit lines intersect each other, and decreasing the differential effect of undesirable signals induced therein. CONSTITUTION: A pair of complimentary bit lines 26 and 28 intersects each other at a point 46 so that one section of the bit line 26 is adjacent to a data bus conductor 24, and one section of the bit line 28 is also adjacent to the conductor 24. Therefore, an undesirable signal entering the upper bit line section 26 due to parasitic capacity 38 has a same intensity as an undesirable signal entering the upper section of bit line 28 due to parasitic capacity 40. Similarly, parasitic capacities 42 and 44 connect voltages of a same intensity to each lower section of the bit lines 26 and 28 respectively. And the intersected bit lines 26 and 28 induce undesirable signals in both bit lines 26 and 28 and reduces the differential effect. Thus, noise interference in memory is reduced.
申请公布号 JPH03283080(A) 申请公布日期 1991.12.13
申请号 JP19910004340 申请日期 1991.01.18
申请人 TEXAS INSTR INC <TI> 发明人 SEODOA DABURIYUU HIYUUSUTON;PATORITSUKU DABURIYUU BOTSUSHIYAATO
分类号 G11C11/401;G11C11/34;H01L21/8244;H01L27/10;H01L27/11 主分类号 G11C11/401
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