| 摘要 |
<p>The comparator circuit of the autozeroed type, for implementation in CMOS technology, includes two identical cascaded amplifier stages (A1, A2), and one final stage at which output a square-wave signal, representing the times during which the input signal (Vin) is higher than the reference signal (Vref), is present. Each one of the two amplifier stages (A1, A2) includes an inverter (M1, M2; M5, M6) driven by a follower circuit (M3, M4; M7, M8).</p> |
