发明名称 TIMING RECOVERY SYSTEM IN TIME DIVISION MULTIPLEXER
摘要 PURPOSE:To correctly recover a slow clock at a transmission side by sending phase shifting information from a TDM at a transmission side, and performing the recovery of the slow speed clock while adjusting a frequency division ratio by using the phase shifting information with a TDM at a reception side. CONSTITUTION:At the TDM 18a at the transmission side, a phase shift sending circuit 17 generates the phase shifting information representing phase shift between e phase of the slow speed clock inputted from a slow speed modem and that of a high speed clock, and transmits it to the TDM 20a at the reception side by using a high speed line 40. At the TDM 20a at the reception side, a phase shift reception circuit 23 starts up a frequency divider 21 by releasing the reset of the frequency divider 21 receiving the phase shifting information. A setting circuit 22 recognizes the deviation of a data sampling timing from the phase shifting information receiving first, and varies the frequency division ratio of the frequency divider 21 at appropriate time.
申请公布号 JPH03274835(A) 申请公布日期 1991.12.05
申请号 JP19900075072 申请日期 1990.03.23
申请人 MITSUBISHI ELECTRIC CORP 发明人 YAMADA YOSHIKO
分类号 H04J3/06;H04L7/02 主分类号 H04J3/06
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