| 摘要 |
PURPOSE:To raise processing speed with a small-scale circuit constitution by comparing the size of data among the plural data with the one of the plural input data as the comparison data and deciding the order of the size of the comparison data among the plural data. CONSTITUTION:Data which are input data P1>P2>P3 are inputted, the data of the P1 are set in a register 11 as comparison data Q and the order of the size of the data P1 is decided. According to algorithmic order decision, the respective outputs of comparators 24 to 26, the number of a signal when P1>Q is an H level is '0', the number of the signal when P1=Q is an L level is '1' and the P1 data are the largest among the three data. The P2 and the P3 are set as the comparison data Q in the register 11 in order in the same way and the order of the size of the respective data is judged. Thus, input data values are set in the register 11 in order as much as the number of the input data and are compared by the comparators 24 to 26, the number of the P1>Q of the H level and the number of the P1=Q are counted by counters 29 and 30 and the order of the size of the respective input data can be decided. |
