| 摘要 |
PURPOSE:To realize a high-speed decoder circuit through cinstituting the circuit with the strip lines that have the entirely matched termination, by using a latch type double-input Josephson AND gate. CONSTITUTION:Josephson elements J1 and J2 of the 1st stage form a double-input AND gate for an address signal A1, an anti-A1 and a start signal Is, and then latch the value according to the AND. In the same way, Josephson elements J3-J6 of the 2nd stage carry out an AND process and the latching in accordance with an address signal A2, an anti-A2 plus the latch signals of the elements J1 and J2 respectively. The similar processes are carried out for the following stages and the address decoding signals are generated via load resistances RL7... connected either one of Josephson elements J7-J14, etc. In such a constitution that these Josephson elements have the latching action but to FF action, the resistances RL7... can give the matching to each specific impedance of the strip wiring. Thus a decoder circuit can per- form a high-speed operation. |
