| 摘要 |
<p>PURPOSE:To prevent the generation of a data error at the time of replacing data by latching reception data with two clock signals having respectively different phases at the time of replacing data and selecting and outputting the data generating no data error out of the two latched and outputted data. CONSTITUTION:Reception data to be replaced are latched by two clock signals 1 CLK1, CLK2 having a phase difference each other and two data having a phase difference each other are outputted. A timing pulse comparator 30 compares the timings of a reception latch timing pulse 1, a reception latch timing pulse 2 with that of a transmission multiplexing timing pulse and inputs a selective signal for selecting the data of timing which is not superposed to the transmission latch timing pulse to a selective means 20, which selects and outputs data specified by the selective signal. A multiplexing part 40 sends multiplexed data as transmission data. Thus, the generation of a data error at the time of replacing data can be prevented.</p> |
