发明名称 Method and apparatus for forming a conductive pattern on an integrated circuit
摘要 <p>In a method for processing an integrated circuit of the type having conductive die bond pads thereon the fabricated IC is coated with a layer of photoresist (16) which is exposed to create a pattern which includes windows (18-29) over the pads and a connection between at least two of the pads. The exposed photoresist is dissolved and the exposed portions are plated with gold to a depth sufficient for creating a bump over each die bond pad suitable for bonding a conductive lead thereto. The remaining photoresist is dissolved thus leaving a plurality of bumps for attaching conductive leads thereto and an electrical connection (24, 26, 28) between at least two of the bumps. <IMAGE></p>
申请公布号 GB2244176(A) 申请公布日期 1991.11.20
申请号 GB19910008848 申请日期 1991.04.24
申请人 * HEWLETT-PACKARD COMPANY 发明人 MELISSA D * BOYD
分类号 H01L21/60;H01L23/485 主分类号 H01L21/60
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