| 摘要 |
<p>PURPOSE:To detect erroneous frame synchronization by counting a frame pulse when a frame pattern dissidence detection signal is generated, converting the count till a frame synchronization release signal is generated into a backward protection stage number and giving the result to a frame synchronization establishment protection circuit. CONSTITUTION:A protection stage number control circuit 4 receiving a frame pattern dissidence detection signal together with other signal counts a frame pulse by receiving a frame pulse generated from a frame pulse generating circuit 3 for each frame period based on the clock. Since a frame synchronization release state signal is outputted from a frame synchronization release protection circuit 1 after lapse of processing of a prescribed protection stage number, the protection stage number control circuit 4 stops the count of the frame pulse by using the frame synchronization release state signal, and converts the count so far into a backward protection stage number and gives it to a frame synchronization release protection circuit 2. Thus, erroneous frame synchronization establishment is prevented.</p> |
