发明名称 LOGICAL CIRCUIT
摘要 <p>PURPOSE:To simplify constitution and to achieve single-power-source drive by specifying the address of a memory by outputs of relay circuits of respective stages of a counter, composed of relay circuits each having a latching relay, and by controlling following relays. CONSTITUTION:Signals from input terminals 1-7 are supplied from an input synthesizing circuit 8 to a counter 9, which performs counting operation. Respective relay circuit 10-13 of the counter 9 include latching relays and every time a signal is inputted to a toggle input terminal T, the relay switches are switched for selfholding. The outputs of the relay switches 14-17 are inputted to input terminals A0-A3 of a programmable read-only memory 19 individually, and the memory 19 outputs program-stored logical outputs to output terminals D0-D7 in response to those input signals. Every time those output sgnals are received at input terminals, relay circuits 20-27 change connections states of external switches. One power terminal V of each relay circuit is connected to an H-level terminal Vcc, and the other terminal G is grounded at a level L.</p>
申请公布号 JPS5766592(A) 申请公布日期 1982.04.22
申请号 JP19800142208 申请日期 1980.10.11
申请人 MATSUSHITA DENKO KK 发明人 MATSUBARA YUUSAKU
分类号 G11C17/00;G05B19/05;G11C8/00;H03K19/003;H03K19/02 主分类号 G11C17/00
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