Non-volatile semiconductor memory device having EEPROM cell, dummy cell and sense circuit for increasing reliability and enabling one-bit operation.

摘要

A non-volatile semiconductor memory device comprises an EEPROM cell (1), a dummy cell (101), and a sense circuit (5). The EEPROM cell (1), the dummy cell (101) and the sense circuit (5) are operatively connected to a drain column line (21, DCL) and a control column line (22, CCL), and the sense circuit (5) reads out the content written in the EEPROM cell (1) by the difference between a current (Ir) flowing through the EEPROM cell (1) from the drain column line (21, DCL) and a current (Id) flowing through the dummy cell (101) from the control column line (22, CCL). Consequently, write/erase operations of data for each one bit can be carried out in one operation, and access time can be shortened and deterioration of a cell transistor can be decreased in a read-out operation. <IMAGE>