发明名称 DOWN EDGE TRIGGER SIGNAL GENERATING CIRCUIT FOR JOSEPHSON CIRCUIT
摘要 PURPOSE:To attain effective use of a down edge trigger signal current as a timing signal by obtaining the down edge trigger signal current rising attended with the fall of the current of a power supply of a phase of the power supply applied to control terminal at a load impedance connecting to the output terminal of a switching gate. CONSTITUTION:A static circuit network of a 4-junction closed loop Josephson switching gate 10 consists of a superconducting line having a series circuit of 1st and 2nd Josephson junctions J1, J2 and a superconducting line having a series circuit of 3rd and 4th Josephson junctions J3, J4 and the two superconducting lines are connected at both ends. All the Josephson junctions J1-J4 are switched into a voltage state to supply a gate current to a load impedance through an output terminal TL, resulting that a down edge trigger signal current triggered by a trailing edge of the control current and rising thereby is obtained as required. Thus, the timing signal effective to the Josephson circuit system is obtained rationally.
申请公布号 JPH03242018(A) 申请公布日期 1991.10.29
申请号 JP19900039259 申请日期 1990.02.20
申请人 AGENCY OF IND SCIENCE & TECHNOL 发明人 NAKAGAWA HIROSHI
分类号 H03K5/1532;H03K3/38;H03K5/00;H03K17/92;H03K19/195 主分类号 H03K5/1532
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