| 摘要 |
PURPOSE:To obtain this small-sized variable delay element with a large delay by combining a storage element and a logic circuit to make a delay time. CONSTITUTION:When an input pulse is inputted to an input terminal 1, an optional counting circuit 8 starts the counting and the counted value is inputted to a storage element 11 as an address. When the address reaches an address in which a level '1' is written in advance, the storage element 11 outputs logic '1' and a waveform shaping circuit 12 adjusts the pulse width and the result is outputted from an output terminal 2. Thus, a pulse signal inputted from the input terminal 1 is delayed by the counting speed of the optional counting circuit 8 and the address written in the storage element 11 and outputted to an output terminal. Thus, an optional pulse train or pulse width is obtained by setting a data to be written in the storage element 11 to plural positions. |
