| 摘要 |
PURPOSE:To sufficiently enable, for example, sign bit extension by shifting a shift register for reception for (n)-(m)+1[m<n] times only when a prescribed bit appears on a transfer means at the time of transferring data from the shift register for transmission of the (m) bits to the shift register for reception of the (n) bits. CONSTITUTION:A shift register 21 for transmission of the (m) bits, shift register 22 for reception of the (n) bits [m<n] and serial transfer means 23 arranged between the both registers 21 and 22 are provided. Further, a means is provided to fetch the prescribed bits as the same value data as the continuous (n-m+1) bits of the received data by exerting the shift operation (n-m+1) times only upon the shift register 22 for reception while the prescribed bit appears on the transfer means 23 when transferring the data from the shift register 22 for transmission through the transfer means 23 to the shift register 22 for reception. Thus, the sign bit extension to be required when changing the number of bits i the complementary form data of 2, for example, can be easily realized at the time of transferring data. |
