发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT FOR TELEPHONE SET
摘要 <p>PURPOSE:To increase a memory protection voltage more by devising the circuit such that a redial memory or a memory cell and an input output of a repertory memory is driven at a voltage lower than a power supply voltage. CONSTITUTION:At memory readout, one of bit lines 3 is selected and an H level is shifted to VDD level or VSSC level by a level shifter 4 and a signal is inputted to a RAM 5 driven at the VSSC level. Similarly, a level of a word line 6 is brought from an H level into the VDD level or VSSC level by a level shifter 7 and the signal is inputted to the RAM 5. An output 8 from the RAM 5 is shifted from H level into the VSSC or VDD level by a level shifter 9. Thus, a redial memory or a memory cell and an input/output of a repertory memory 5 is driven at a voltage level VSSC lower than a power supply voltage level VDD to increase the memory protection voltage more.</p>
申请公布号 JPH03219750(A) 申请公布日期 1991.09.27
申请号 JP19890246131 申请日期 1989.09.21
申请人 SEIKO INSTR INC 发明人 OGASAWARA YASUAKI
分类号 G11C17/00;G11C16/06;H04M1/27 主分类号 G11C17/00
代理机构 代理人
主权项
地址