发明名称 DEMODULATING CIRCUIT OF DIGITAL RADIO RECEIVING EQUIPMENT
摘要 PURPOSE:To eliminate the offset of a center voltage caused by an intermediate frequency voltage by inserting a low-pass filter circuit between a frequency discriminating circuit, and an amplifying circuit for amplifying an output of this frequency discriminating circuit. CONSTITUTION:When a voltage of an (a) point and a voltage of a (b) point in the case there is no input to a frequency discriminating circuit 1 are denoted as Vao and Vr, respectively, a capacitor 3 is charged with charge corresponding to a voltage of Vao-Vr, and in this case, when a signal of a center voltage value Vas is outputted to the (a) point, an average voltage of the (b) point becomes Vas-(Vao-Vr)=Vr+(Vas-Vao). In such a state, in the case of (Vas-Vao)>'0', the capacitor is discharged through an analog switch 8, and in the case of (Vas-Vao)<'0', it is charged through the switch 8, the voltage of the (b) point becomes Vr quickly, and a receiving rise is completed. Also, as shown in the waveform figure (a), the switch 8 is turned off after 50ms from the rise time point of an SQ signal, but at this time point, the receiving rise is completed already.
申请公布号 JPH03209948(A) 申请公布日期 1991.09.12
申请号 JP19900003463 申请日期 1990.01.12
申请人 JAPAN RADIO CO LTD 发明人 HIGAKI KENJI;TERAOKA KIICHI;SUGANUMA HAJIME
分类号 H04L27/14;H04L27/148 主分类号 H04L27/14
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