发明名称 NORMALIZATION CONTROL SYSTEM FOR FLOATING POINT ARITHMETIC OPERATIONS
摘要 A microprogram controlled microprocessor capable of normalizing a given data in a floating point representation includes a memory storing a microprogram, an address register for holding a microprogram start address, an operand register for holding a source operand, a temporary register for temporarily holding an operation data, a pointer for holding a code indicative of the operand register at the time of starting the microprogram and for indicating a transfer source register in a transfer operation between internal registers, and a discriminator for discriminating whether or not an input source operand is a normalized number. The microprocessor operates on the basis of the microprogram to execute a given operation to the input source operand while causing the discriminator to discriminate whether or not the input source operand is a normalized number, so that the microprogram is completed without a branch when the input source operand is a normalized number. On the other hand, when the input source operand is an unnormalized number, the microprocessor operates to branch to a normalizing program and to cause a normalized operand to be held in the temporary register and a code indicative of the temporary register to be set to the pointer. In addition, the microprocessor operates to re-execute the microprogram from the address designated by the address register.
申请公布号 EP0343668(A3) 申请公布日期 1991.09.11
申请号 EP19890109462 申请日期 1989.05.26
申请人 NEC CORPORATION 发明人 KOJIMA, SHINGO
分类号 G06F5/01;G06F7/00;G06F7/76;G06F9/22;G06F9/26;G06F9/302;(IPC1-7):G06F5/00 主分类号 G06F5/01
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