发明名称 |
CLOCK GENERATOR FOR PWM SYSTEM DIGITAL ANALOG CONVERTER |
摘要 |
<p>PURPOSE:To improve the S/N of a PWM type D/A converter by suppressing an undesired spectrum in the circuit and in an actual semiconductor device so as to avoid the production of the undesired spectrum in a spectrum of an input clock to the PWM type D/A converter. CONSTITUTION:The generator is provided with an oscillation circuit 1 oscillating a frequency being an integral multiple of the least common multiple of different input sampling frequencies and frequency divider circuits 6-9 frequency-dividing the clock frequency and generating different outputs of the input sampling frequency. Moreover, switches 2-5 selecting only clock inputs to the frequency divider circuits 6-9 corresponding to the selected input sampling frequencies and stopping the clock input to the frequency divider circuits 6-9 corresponding to not selected input sampling frequencies and a selector circuit 10 selecting an output corresponding to the selected input sampling frequency are provided. Thus, the production of an undesired spectrum is prevented and the purity of the spectrum is enhanced.</p> |
申请公布号 |
JPH03206731(A) |
申请公布日期 |
1991.09.10 |
申请号 |
JP19900001341 |
申请日期 |
1990.01.08 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
YAMATE KAZUNORI |
分类号 |
H03M1/66;G06F1/06;H03K3/70;H03M1/06;H03M1/08;H03M1/82;H03M1/86 |
主分类号 |
H03M1/66 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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