| 摘要 |
<p>PURPOSE:To obtain a clock pulse extracting circuit, which can be made into an IC, by a shift register to which data is inputted, an adder which adds the output of this shift register, a comparator which compares the addition voltage of this adder with a constant value, and a flip flop to which the comparison output is inputted. CONSTITUTION:When input data is shifted in an n-bit shift register 1, outputs of respective bits are supplied to delay circuits 2a-2n and exclusive OR circuits 3a-3n, and pulses are generated at the rise and the fall. Outputs of circuits 3a- 3n are added by an adding circuit 4; and when the output voltage of the circuit 4 becomes higher than a reference voltage VS, an output is generated from a comparator 5. This comparison output is applied to a JKFF6 to form clock pulses. Obtained clock pulses are supplied to the shift register 1 through an AND circuit 8 and an OR circuit 10 to shift data.</p> |
